Title :
A 1-tap 40-Gbps look-ahead decision feedback equalizer in 0.18 μm SiGe BiCMOS technology
Author :
Garg, Adesh ; Carusone, Anthony Chan ; Voinigescu, Sorin P. ; Rogers, Edward S., Sr.
Author_Institution :
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
fDate :
30 Oct.-2 Nov. 2005
Abstract :
This paper describes a fully-differential 1-Tap decision feedback equalizer (DFE) in 0.18μm SiGe BiCMOS technology. The circuit is capable of equalizing NRZ data up to 40 Gbps. A look-ahead architecture is used with modifications to reduce complexity in the high speed clock distribution. An analog differential voltage controls the tap weights. The design is fabricated in 0.18 μm SiGe BiCMOS technology with a 160-GHz ft. It occupies an area of 1.5 mm × 1mm and operates from a 3.3 V supply with 230 mA current. It is the first feedback equalizer at 40 Gbps in silicon.
Keywords :
BiCMOS analogue integrated circuits; Ge-Si alloys; clocks; decision feedback equalisers; integrated circuit design; 0.18 micron; 160 GHz; 230 mA; 3.3 V; 40 Gbit/s; BiCMOS; NRZ data; SiGe; analog differential voltage control; decision feedback equalizer; high speed clock distribution; look-ahead architecture; BiCMOS integrated circuits; Clocks; Current supplies; Decision feedback equalizers; Feeds; Germanium silicon alloys; Intersymbol interference; Optical feedback; Silicon germanium; Voltage control;
Conference_Titel :
Compound Semiconductor Integrated Circuit Symposium, 2005. CSIC '05. IEEE
Print_ISBN :
0-7803-9250-7
DOI :
10.1109/CSICS.2005.1531748
