Title :
An ESD protection circuit for SOI technology using gate- and body-biased MOSFETs
Author :
Salman, Aham ; Mitra, Souvick ; Ioannou, Dimitris E. ; Fechner, Paul ; Liu, Mike
Author_Institution :
Dept. of Electr. & Comput. Eng., George Mason Univ., Fairfax, VA, USA
Abstract :
An ESD input/output protection circuit for 0.35 μm PDSOI technology was designed, fabricated and tested. The design is such that bias is applied simultaneously but independently on the protection device body and gate during the ESD events, but not during normal operation. There is significant ESD protection capability (∼60%) improvement following moderate X-ray irradiation.
Keywords :
MOSFET; X-ray effects; electrostatic discharge; silicon-on-insulator; 0.35 micron; ESD protection circuit; SOI technology; X-ray irradiation; biased-gate MOSFET; body-biased MOSFET; high current I-V curves; input/output protection circuit; Electrostatic discharges; MOSFETs; Silicon on insulator technology; X-ray effects;
Conference_Titel :
SOI Conference, IEEE International 2002
Print_ISBN :
0-7803-7439-8
DOI :
10.1109/SOI.2002.1044410
