Title :
An opposite side floating gate FLASH memory scalable to 20 nm length
Author :
Lin, Xinnan ; Chan, Mansun
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Abstract :
Summary form only given. In this paper, a new opposite side floating gate FLASH memory cell structure based on double-gate MOSFETs is proposed. The new structure decouples the write/erase process with the read process so that a thick gate oxide is used in the write/erase process to preserve non-volatility and a thin gate oxide is used in reading to give a high on/off current ratio in read/standby mode. Simulation results shows that FLASH scaling to the 20 nm node is possible using the new structure.
Keywords :
CMOS memory circuits; flash memories; 20 nm; SOI; double-gate MOSFETs; high on/off current ratio; opposite side floating gate FLASH memory; read process; read/standby mode; simulation; thick gate oxide; thin gate oxide; write/erase process; CMOS memory integrated circuits;
Conference_Titel :
SOI Conference, IEEE International 2002
Print_ISBN :
0-7803-7439-8
DOI :
10.1109/SOI.2002.1044422
