Highly stable partial body tied SOI CMOS technology with Cu interconnect and low-k dielectric for high performance microprocessor

Partially body tied (BT) SOI CMOS technology with 7 levels of Cu interconnect and low-k (k=3.7) dielectric processes for highly stable high performance microprocessor was demonstrated. Partial BT SOI technology was applied to only critical circuits sensitive to the floating body effect. The delay chain speed and the peak power consumption are improved 10% and 15%, compared to those of bulk Si, respectively. The maximum frequency of the microprocessor with the partial BT SOI was 1.35 GHz. It has also improved the V_dd margin as well as lower frequency operation.