SOI-Specific tri-state inverter and its application

Author

Kim, Jae-Joon ; Roy, Kaushik

Author_Institution

Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA

fYear

2002

fDate

7-10 Oct 2002

Firstpage

145

Lastpage

146

Abstract

The initial-cycle parasitic bipolar effect reduces the noise margin and degrades the performance of the floating body partially depleted silicon-on-insulator (PD/SOI) pass-transistor circuits. To solve the problem, the floating body charge monitor technique was proposed by Saccamango et al (2000) and Kuang et al (2001). In this paper, we show the limitations of the charge monitor technique and propose a new robust PD/SOI tri-state inverter.

Keywords

bipolar transistors; invertors; multiplexing equipment; semiconductor device models; semiconductor device noise; silicon-on-insulator; SOI-specific tri-state inverter; UFSOI SPICE model; floating body charge monitor technique; initial-cycle parasitic bipolar effect; noise margin; Bipolar transistors; Inverters; Semiconductor device modeling; Semiconductor device noise; Silicon on insulator technology;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, IEEE International 2002

Print_ISBN

0-7803-7439-8

Type

conf

DOI

10.1109/SOI.2002.1044454

Filename

1044454

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2406657