A low-voltage mixed-mode CMOS/SOI integrated circuit for 13.56 MHz RFID applications

Author

Villard, P. ; Bour, C. ; Dallard, E. ; Lattard, D. ; de Pontcharra, J. ; Robert, G. ; Roux, S.

Author_Institution

Lab d´´Electron. et de Technol. de l´´Inf., CEA, Centre d´´Etudes Nucleaires de Grenoble, France

fYear

2002

fDate

7-10 Oct 2002

Firstpage

163

Lastpage

164

Abstract

A low-voltage mixed-mode CMOS/SOI integrated circuit for 13.56 MHz RFID applications is presented. When connected to an external inductive loop antenna and put in a reader magnetic field, the chip is remote powered. Nominal supply voltage lowering down to 1.2 V (digital part) and 1.5 V (analog part) was achieved using a 0.25 μm partially-depleted CMOS/SOI technology. Device level simulations were done with the LETISOI model. Measurements proved the chip functionality and the suitability of the technology for lower voltages. To our knowledge, it is the first mixed-mode CMOS/SOI chip dedicated to RFID.

Keywords

CMOS integrated circuits; integrated circuit modelling; mixed analogue-digital integrated circuits; silicon-on-insulator; 1.2 V; 1.5 V; 13.56 MHz; ASIC; LETISOI model; RF identification systems; RFID applications; chip functionality; device level simulations; external inductive loop antenna; low-voltage mixed-mode CMOS/SOI integrated circuit; multi-tag RFID system; partially-depleted CMOS/SOI technology; remote powered chip; CMOS integrated circuits; Integrated circuit modeling; Mixed analog-digital integrated circuits; Silicon on insulator technology;

fLanguage

English

Publisher

ieee

Conference_Titel

SOI Conference, IEEE International 2002

Print_ISBN

0-7803-7439-8

Type

conf

DOI

10.1109/SOI.2002.1044460

Filename

1044460