DocumentCode :
2406921
Title :
A new current mirror layout technique for improved matching characteristics
Author :
Lan, Mao-Feng ; Tammineedi, Anilkumar ; Geiger, Randall
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Volume :
2
fYear :
1999
fDate :
1999
Firstpage :
1126
Abstract :
This paper proposes a new current mirror layout technique to improve matching characteristics in the presence of parameter gradient. Effects of threshold gradients across a mirror on the matching characteristics of current mirrors are discussed. New and the existing layouts are compared with computer simulations for threshold voltage gradients at all angles across the active area. Results show a significant improvement in matching characteristics of the proposed structures over what is achievable with existing layout techniques
Keywords :
CMOS analogue integrated circuits; circuit layout CAD; circuit simulation; current mirrors; integrated circuit layout; computer simulations; current mirror layout technique; gradient modelling; improved matching characteristics; linear gradient; parameter gradient; segmented integral approach; threshold gradients effect; Computer simulation; Degradation; Differential amplifiers; Geometry; Linear circuits; Mirrors; Semiconductor device modeling; Statistical analysis; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1999. 42nd Midwest Symposium on
Conference_Location :
Las Cruces, NM
Print_ISBN :
0-7803-5491-5
Type :
conf
DOI :
10.1109/MWSCAS.1999.867835
Filename :
867835
Link To Document :
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