Title :
Transient and crosstalk analysis of interconnection lines for single level integrated packaging modules
Author :
Zheng, L.-R. ; Tenhunnen, H.
Author_Institution :
Dept. of Electron., R. Inst. of Technol., Kista, Sweden
Abstract :
This paper investigates the geometric requirements and performance of interconnect lines which is utilized for single level hierarchy integration modules. It is found that high data rates with good signal integrity can be carried from chip to chip using optimized geometries
Keywords :
circuit optimisation; crosstalk; integrated circuit design; integrated circuit interconnections; integrated circuit metallisation; integrated circuit packaging; modules; network analysis; transient analysis; crosstalk analysis; data rates; geometric requirements; interconnect line performance; interconnection lines; optimized chip geometries; signal integrity; single level hierarchy integration modules; single level integrated packaging modules; transient analysis; Bonding; Conductors; Dielectric thin films; Electronics packaging; Geometry; Integrated circuit interconnections; Laboratories; Transient analysis; Transmission lines; Wires;
Conference_Titel :
Electrical Performance of Electronic Packaging, 1998. IEEE 7th Topical Meeting on
Conference_Location :
West Point, NY
Print_ISBN :
0-7803-4965-2
DOI :
10.1109/EPEP.1998.733900
