Embedded DRAM (eDRAM) power-energy estimation for system-on-a-chip (SoC) applications

Author

Park, Yong-Ha ; Kook, Jeonghoon ; Yoo, Hoi-Jun

Author_Institution

Dept. of Electron. Eng., Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea

fYear

2002

fDate

2002

Firstpage

625

Lastpage

630

Abstract

Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improves the accuracy of the conventional SRAM power-energy models. The SSBA model combined with the high-level memory access statistics provides a fast and accurate system level power-energy estimation of eDRAM. The power-energy estimation using SSBA model shows 95% accuracy compared with the transistor level power simulation results for three fabricated eDRAMs

Keywords

DRAM chips; embedded systems; integrated circuit modelling; low-power electronics; embedded DRAM; high-level memory access statistics; power-energy estimation; signal swing based analytic model; system-on-a-chip; Capacitance; Energy consumption; Performance analysis; Power system interconnection; Power system modeling; Random access memory; Research and development; Signal analysis; Statistics; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.

Conference_Location

Bangalore

Print_ISBN

0-7695-1441-3

Type

conf

DOI

10.1109/ASPDAC.2002.995006

Filename

995006