Title :
Scaling analysis of interconnectivity and crosstalk in VLSI circuits
Author :
Zheng, L.-R. ; Tenhunnen, H.
Author_Institution :
Dept. of Electron., R. Inst. of Technol., Stockholm, Sweden
Abstract :
This paper analyses the interconnectivity and crosstalk of submicron wires used for VLSI interconnects. The maximum interconnectivity is optimized under some fundamental constraints, such as wire geometries, crosstalk, etc
Keywords :
VLSI; circuit optimisation; crosstalk; integrated circuit interconnections; integrated circuit metallisation; integrated circuit modelling; VLSI circuits; VLSI interconnects; crosstalk; interconnectivity; maximum interconnectivity optimization; scaling analysis; wire geometries; Capacitance; Clocks; Conductors; Crosstalk; Dielectrics; Integrated circuit interconnections; Shape; Very large scale integration; Wires; Wiring;
Conference_Titel :
Electrical Performance of Electronic Packaging, 1998. IEEE 7th Topical Meeting on
Conference_Location :
West Point, NY
Print_ISBN :
0-7803-4965-2
DOI :
10.1109/EPEP.1998.733905
