Title :
Mode selection and mode-dependency modeling for power-aware embedded systems
Author :
Li, Dexin ; Chou, Pai H. ; Bagherzadeh, Nader
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
Abstract :
Among the techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model supporting multiple components at the same time. We propose a new method for modeling and selecting the power modes for the optimal system-power management of embedded systems under timing and power constraints. First, we not only model the modes and the transitions overhead at the component level, but we also capture the application-imposed relationships among the components by introducing a mode dependency graph at the system level. Second, we propose a mode selection technique, which determines when and how to change mode in these components such that the whole system can meet all power and timing constraints. Our constraint-driven approach is a critical feature for exploring power/performance tradeoffs in power-aware embedded systems. We demonstrate the application of our techniques to a low-power sensor and an autonomous rover
Keywords :
circuit optimisation; constraint theory; embedded systems; graph theory; logic design; low-power electronics; microsensors; timing; application-imposed relationships; autonomous rover; constraint-driven approach; low-power sensor; microsensor; mode dependency graph; mode selection; mode-dependency modeling; optimal system-power management; power constraints; power-aware embedded systems; power/performance tradeoffs; system-level power management; timing constraints; Embedded system; Encoding; Energy management; Frequency; Power system management; Power system modeling; Sensor systems and applications; Thermal management; Timing; Voltage control;
Conference_Titel :
Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.
Conference_Location :
Bangalore
Print_ISBN :
0-7695-1441-3
DOI :
10.1109/ASPDAC.2002.995016