DocumentCode :
2407403
Title :
Input space adaptive embedded software synthesis
Author :
Wang, Weidong ; Raghunathan, Anand ; Lakshminarayana, Ganesh ; Jha, Niraj K.
Author_Institution :
Dept. of Electr. Eng., Princeton Univ., NJ, USA
fYear :
2002
fDate :
2002
Firstpage :
711
Lastpage :
718
Abstract :
This paper presents a novel technique, called input space adaptive software synthesis, for the energy and performance optimization of embedded software. The proposed technique is based on the fact that the computational complexities of programs or sub-programs are often highly dependent on the values assumed by input and intermediate program variables during execution. This observation is exploited in the proposed software synthesis technique by augmenting the program with optimized versions of one or more sub-programs that are specialized to, and executed under, specific input sub-spaces. We propose a methodology for input space adaptive software synthesis which consists of the following steps: control and value profiling of the input program, application of compiler transformations as a preprocessing step, identification of sub-programs and corresponding input sub-spaces that hold the highest potential for optimization, and transformation of the sub-programs to realize performance and energy savings. We have evaluated input space adaptive software synthesis by compiling the resulting optimized programs to two commercial embedded processors (Fujitsu SPARCliteTM and Intel StrongARMTM). Our experiments indicate that our techniques can reduce energy consumption of the whole program by up to 7.8× (an average of 3.1× for SPARClite and 2.6× for StrongARM) while simultaneously improving performance by up to 8.5× (an average of 3.1× for SPARClite and 2.7× for StrongARM), leading to an improvement in the energy-delay product by up to 66.7× (an average of 8.2× for SPARClite and 6.3× for StrongARM), at the cost of minimal code size overheads (an average of 5.9%)
Keywords :
computational complexity; embedded systems; low-power electronics; optimising compilers; software engineering; subroutines; Fujitsu SPARClite; Intel StrongARM; compiler transformations; computational complexities; control profiling; embedded processors; energy consumption; energy optimization; input space adaptive software synthesis; optimized sub-program versions; performance optimization; portable low-power electronic systems; program optimization; value profiling; Adaptive control; Application software; Computational complexity; Data preprocessing; Embedded software; Optimization; Optimizing compilers; Program processors; Programmable control; Software performance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2002. Proceedings of ASP-DAC 2002. 7th Asia and South Pacific and the 15th International Conference on VLSI Design. Proceedings.
Conference_Location :
Bangalore
Print_ISBN :
0-7695-1441-3
Type :
conf
DOI :
10.1109/ASPDAC.2002.995018
Filename :
995018
Link To Document :
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