• DocumentCode
    2407429
  • Title

    Experiences using the Cray Multi-Threaded Architecture (MTA-2)

  • Author

    Anderson, Wendell ; Rosenberg, Robert ; Lanzagorta, Marco

  • Author_Institution
    Naval Res. Lab., MS, USA
  • fYear
    2003
  • fDate
    9-13 June 2003
  • Firstpage
    378
  • Lastpage
    383
  • Abstract
    The Naval Research Laboratory has recently installed and is operating a 40-processor Cray Multithreaded Architecture (MTA-2) computer. The MTA-2 with its hardware support for multithreading and large uniformly accessible memory offers a promising new paradigm in parallel computing, especially for large problems. In order to evaluate the machine, four typical applications whose structures would lend themselves to the MTA were selected and evaluated in terms of the level of effort and reprogramming required in contrast to the benefits in running in an MTA environment. The amount of changes required to port the code ranged from very little to a substantial rewrite of portions of the code. Performance improvements ranging from a factor of two to more than 10 over the previous implementations were noted.
  • Keywords
    Cray computers; multi-threading; parallel architectures; parallel machines; Cray Multi-Threaded Architecture; code rewriting; large uniformly accessible memory; parallel computing; reprogramming; Application software; Clocks; Computer architecture; Counting circuits; Hardware; Laboratories; Parallel processing; Registers; Space technology; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    User Group Conference, 2003. Proceedings
  • Print_ISBN
    0-7695-1953-9
  • Type

    conf

  • DOI
    10.1109/DODUGC.2003.1253421
  • Filename
    1253421