DocumentCode :
2407728
Title :
System Architecture of H.264/AVC Codec LSI for Digital HD Camcorder
Author :
Inata, Keisuke ; Sasamoto, Manabu ; Nonaka, Tomoyuki ; Komi, Hironori
Author_Institution :
Consumer Electron. Lab., Hitachi, Ltd., Yokohama
fYear :
2008
fDate :
9-13 Jan. 2008
Firstpage :
1
Lastpage :
2
Abstract :
A single chip H.264/AVC codec LSI was newly developed for digital HD camcorder, which integrates a video codec, an audio codec, graphics, video interfaces, peripherals, a host processor, and an SDRAM interface. In order to realize low-power real-time receding and playing back system, the LSI uses a software-based codec architecture and a flexible SDRAM control architecture.
Keywords :
DRAM chips; audio coding; video cameras; video codecs; video coding; H.264/AVC codec; SDRAM interface; audio codec; digital HD camcorder; large scale integration; peripherals; playing back system; software-based codec; system architecture; video codec; video interfaces; Automatic voltage control; Control systems; Graphics; Hardware; High definition video; Large scale integration; Real time systems; SDRAM; Video codecs; Video equipment;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics, 2008. ICCE 2008. Digest of Technical Papers. International Conference on
Conference_Location :
Las Vegas, NV
Print_ISBN :
978-1-4244-1458-1
Electronic_ISBN :
978-1-4244-1459-8
Type :
conf
DOI :
10.1109/ICCE.2008.4588073
Filename :
4588073
Link To Document :
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