DocumentCode :
2407784
Title :
Multi drop net topologies for MCM off chip interconnection lines
Author :
Kaller, Dierk ; Harrer, Hubert ; Boehringer, Simone ; Katopis, George
Author_Institution :
IBM Deutschland GmbH, Boeblingen, Germany
fYear :
1998
fDate :
26-28 Oct 1998
Firstpage :
148
Lastpage :
151
Abstract :
The paper describes different topologies for off-chip interconnection lines on a multichip module. The impact of different multi-drop net configurations on the delay is shown for various distances between sending and receiving chips. These results are compared with the timing of two-point connections in thin films and glass ceramics. The impact of the slope at the receiving end of the nets is discussed in particular. Finally, the influence of coupled noise from neighbouring lines is presented
Keywords :
circuit simulation; delays; integrated circuit interconnections; integrated circuit noise; integrated circuit packaging; multichip modules; network topology; timing; MCM off-chip interconnection lines; coupled noise; delay; glass ceramics; multi-drop net configurations; multi-drop net topologies; multichip module; net receiving end slope; off-chip interconnection lines; receiving chip; sending chip; thin films; two-point connection timing; Ceramics; Costs; Delay; Glass; Impedance; Packaging; Timing; Topology; Transistors; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 1998. IEEE 7th Topical Meeting on
Conference_Location :
West Point, NY
Print_ISBN :
0-7803-4965-2
Type :
conf
DOI :
10.1109/EPEP.1998.733931
Filename :
733931
Link To Document :
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