• DocumentCode
    2409162
  • Title

    Pipelined dynamics SISD system organization

  • Author

    Celenk, Mehmet ; Reddy, Vijaykumar

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Ohio Univ., Athens, OH, USA
  • fYear
    1991
  • fDate
    10-12 Mar 1991
  • Firstpage
    128
  • Lastpage
    132
  • Abstract
    The paper describes a pipelined SISD computer system which employs a dynamic data processing unit to execute four fixed point arithmetic operations. A look-ahead instruction scheduling is developed using a simple tagging scheme, which eliminates the tag comparison hardware used in the existing pipelined systems. The branch overheads are reduced by using two instruction streams in a synchronized operation
  • Keywords
    computer architecture; digital arithmetic; pipeline processing; branch overheads; dynamic data processing unit; fixed point arithmetic operations; look-ahead instruction scheduling; pipelined SISD computer system; synchronized operation; tagging; Arithmetic; Counting circuits; Data processing; Decoding; Delay; Hardware; Hazards; Pipelines; Scheduling; Tagging;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System Theory, 1991. Proceedings., Twenty-Third Southeastern Symposium on
  • Conference_Location
    Columbia, SC
  • ISSN
    0094-2898
  • Print_ISBN
    0-8186-2190-7
  • Type

    conf

  • DOI
    10.1109/SSST.1991.138530
  • Filename
    138530