Error Detection Schemes for CED in Block Ciphers

Author

Idzikowska, Ewa ; Bucholc, Krzysztof

Author_Institution

Poznan Univ. of Technol., Poznan

Volume

2

fYear

2008

fDate

17-20 Dec. 2008

Firstpage

22

Lastpage

27

Abstract

Concurrent Error Detection (CED) techniques based on hardware duplication are widely used to enhance system dependability. All CED techniques contain some form of redundancy. In this paper we present simulation results to quantitatively compare various CED schemes based on their area overhead and protection (data integrity) they provide against multiple failures. We describe some studies of parity based concurrent error detection in S-boxes. In this work substitution blocks of PP-1 block-cipher, designed for platforms with very limited resources (for example for embedded systems), are used as a case study.

Keywords

cryptography; data integrity; error detection codes; fault diagnosis; S-box; block cipher; concurrent error detection; data integrity; fault detection; parity code; Analytical models; Circuit faults; Costs; Electromagnetic interference; Embedded system; Fault detection; Hardware; Protection; Redundancy; Ubiquitous computing; Concurrent Error Detection; PP-1 block cipher; fault detection; parity codes;

fLanguage

English

Publisher

ieee

Conference_Titel

Embedded and Ubiquitous Computing, 2008. EUC '08. IEEE/IFIP International Conference on

Conference_Location

Shanghai

Print_ISBN

978-0-7695-3492-3

Type

conf

DOI

10.1109/EUC.2008.134

Filename

4755202