DocumentCode
2409338
Title
RTOS modeling for system level design
Author
Gerstlauer, Andreas ; Yu, Haobo ; Gajski, Daniel D.
Author_Institution
Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA
fYear
2003
fDate
2003
Firstpage
130
Lastpage
135
Abstract
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design exploration. While real time operating systems (RTOS) are an increasingly important component in system design, specific RTOS implementations can not be used directly in high level models. On the other hand, existing system level design languages (SLDL) lack support for RTOS modeling. In this paper we propose a RTOS model built on top of existing SLDLs which, by providing the key features typically available in any RTOS, allows the designer to model the dynamic behavior of multi-tasking systems at higher abstraction levels to be incorporated into existing design flows. Experimental result shows that our RTOS model is easy to use and efficient while being able to provide accurate results.
Keywords
high level synthesis; logic simulation; multiprogramming; operating systems (computers); real-time systems; software engineering; software tools; RTOS modeling; SLDL; design abstraction level; high level system models; multi-tasking system dynamic behavior; real time operating systems; software modeling; software synthesis; software tools; system level design; system level design languages; system level synthesis; Dynamic scheduling; Embedded computing; Embedded software; Operating systems; Productivity; Real time systems; Space exploration; System-level design; Time to market; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2003
ISSN
1530-1591
Print_ISBN
0-7695-1870-2
Type
conf
DOI
10.1109/DATE.2003.1253598
Filename
1253598
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