Device-level fault isolation of advanced flip-chip devices using scanning SQUID microscopy

Author

Teo, C.W. ; Lwin, H.E. ; Narang, V. ; Chin, J.M.

Author_Institution

Adv. Micro Devices Singapore Pte Ltd., Singapore

fYear

2008

fDate

7-11 July 2008

Firstpage

1

Lastpage

4

Abstract

This article describes how a scanning SQUID microscope (SSM) enhances the capability of device-level fault isolation on advanced 90 nm and 65 nm flip-chip microprocessor devices. SSM has proved to be very useful in isolating bump shorts and shorts in copper interconnects. For improved resolution and analyzing bumped dies, a front-side SSM technique is developed that has greatly increased success rates and analysis turn-around time. In this paper, we focus on die-level fault isolation on advanced microprocessor devices with numerous metal layers.

Keywords

SQUIDs; fault location; flip-chip devices; integrated circuit interconnections; microprocessor chips; copper interconnects; die-level fault isolation; flip-chip devices; metal layers; microprocessor devices; scanning SQUID microscopy; size 65 nm; size 90 nm; Biomedical optical imaging; Copper; Current density; Failure analysis; Magnetic sensors; Microprocessors; Optical microscopy; Packaging; Pins; SQUIDs;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 2008. IPFA 2008. 15th International Symposium on the

Conference_Location

Singapore

Print_ISBN

978-1-4244-2039-1

Electronic_ISBN

978-1-4244-2040-7

Type

conf

DOI

10.1109/IPFA.2008.4588164

Filename

4588164