Behavioural modelling and simulation of ΣΔ modulators using hardware description languages

Behavioural simulation is the common alternative to the costly electrical simulation of ΣΔ modulators (ΣΔMs). This paper explores the behavioural modelling and simulation of ΣΔMs by using hardware description languages (HDLs) and commercial behavioural simulators, as an alternative to the common special-purpose behavioural simulators. A library of building blocks, where a HDL has been used to model a complete set of circuit non-idealities, influencing the performance of ΣΔMs, is introduced. Three alternatives for introducing ΣΔM topologies have been implemented. Experimental results of the simulation of a fourth-order 2-1-1 cascade multi-bit ΣΔM are given.