• DocumentCode
    2409722
  • Title

    Dynamic conditional branch balancing during the high-level synthesis of control-intensive designs

  • Author

    Cupta, S. ; Dut, Nikil ; Gupta, Rajesh ; Nicolau, Alex

  • Author_Institution
    Dept. of Inf. & Comput. Sci., California Univ., Irvine, CA, USA
  • fYear
    2003
  • fDate
    2003
  • Firstpage
    270
  • Lastpage
    275
  • Abstract
    We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branches with fewer scheduling steps. This increases the opportunities to apply code motions, such as conditional speculation that duplicate operations into the branches of a conditional block. (2) Determining if an operation can be conditionally speculated into multiple basic blocks either by using existing idle resources or by creating new scheduling steps. These strategies lead to balancing of the number of steps in the conditional branches without increasing the longest path through the conditional block. Algorithms for these strategies have been implemented within the Spark high-level synthesis framework that accepts a behavioral description in ANSI-C as input and produces synthesizable register-transfer level VHDL. Experiments on two moderately complex industrial-strength applications, namely, MPEG-1 and the GIMP image processing tool, demonstrate that conditional speculation is ineffective without using these strategies.
  • Keywords
    hardware description languages; high level synthesis; logic design; parallel programming; probabilistic logic; program control structures; GIMP image processing tool; MPEG-1; conditional block; conditional branches; conditional speculation; control-intensive designs; dynamic conditional branch balancing; high-level synthesis; idle resources; multiple basic blocks; register- transfer level VHDL; scheduling steps; speculative code motions; Application software; Computer science; Design engineering; Dynamic scheduling; High level synthesis; Image processing; Job shop scheduling; Motion control; Resource management; Sparks;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2003
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-1870-2
  • Type

    conf

  • DOI
    10.1109/DATE.2003.1253619
  • Filename
    1253619