Title :
Novel symmetric high Q inductors fabricated using wafer-level CSP technology
Author :
Aoki, Yutaka ; Shimizu, Shoichi ; Honjo, Kazuhiko
Author_Institution :
CASIO Comput. Co. Ltd., Tokyo
Abstract :
Wafer level chip-size package (WLP) technology enables fabrications of low-loss high-Q inductors, which suffer from unfavorable two-port asymmetric characteristics. To overcome this problem, a novel clip-type inductor has been proposed, where the electrode crossover points in multi-turn inductor structures is modified from a conventional mirror symmetric point to a novel electrical symmetric point. The novel clip inductors were designed and fabricated using WPL technology. By means of a developed 4-nH novel clip inductor, the Q-factor value difference between the two ports can be significantly reduced to 1.4% from 14.8% at 1.4 GHz. Q-factors of developed inductors have also been evaluated under both a conventional short-circuited load condition and an impedance matched condition.
Keywords :
Q-factor; inductors; limiters; wafer level packaging; Q-factor; clip inductor; electrode crossover point; impedance matched condition; multiturn inductor structure; short-circuited load condition; symmetric high Q inductor; wafer level chip-size package technology; Circuit simulation; Copper; Equivalent circuits; Impedance; Inductors; Large scale integration; Microwave technology; Q factor; Silicon; Spirals;
Conference_Titel :
Microwave Conference, 2007. European
Conference_Location :
Munich
Print_ISBN :
978-2-87487-001-9
DOI :
10.1109/EUMC.2007.4405399