DocumentCode
2410627
Title
The effects of device metal interconnect overlayers on SEE testing
Author
Wert, Jerry ; Normand, Eugene ; Hafer, Craig
Author_Institution
Boeing Co., Seattle, WA, USA
fYear
2005
fDate
11-15 July 2005
Firstpage
20
Lastpage
25
Abstract
Technology advances in wafer processing and design, new device requirements and improved modeling necessitate the need for a careful determination of LET at and through the critical silicon region of interest during SEE testing.
Keywords
interconnections; radiation effects; semiconductor device metallisation; semiconductor device testing; SEE testing; device metal interconnect overlayers; linear energy transfer; single event effects testing; wafer design; wafer processing; Aluminum; Chemical technology; Energy exchange; Integrated circuit interconnections; Manufacturing processes; Semiconductor device modeling; Silicon; Telephony; Testing; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Radiation Effects Data Workshop, 2005. IEEE
Print_ISBN
0-7803-9367-8
Type
conf
DOI
10.1109/REDW.2005.1532660
Filename
1532660
Link To Document