DocumentCode
2410747
Title
The Need For Formal Verification In Hardware Design And What Formal Verification Has Not Done For Me Lately
Author
Keutzer, Kurt
Author_Institution
Synopsys, Inc.
fYear
1991
fDate
28-30 Aug. 1991
Firstpage
77
Lastpage
86
Keywords
Circuit synthesis; Circuit testing; Design methodology; Formal verification; Hardware; Integrated circuit manufacture; Manufacturing processes; Process design; Pulp manufacturing; Taxonomy;
fLanguage
English
Publisher
ieee
Conference_Titel
HOL Theorem Proving System and Its Applications, 1991., International Workshop on the
Conference_Location
Davis, CA, USA
Print_ISBN
0-8186-2460-4
Type
conf
DOI
10.1109/HOL.1991.596275
Filename
596275
Link To Document