DocumentCode
2411173
Title
Memory Reduction Techniques for Logarithmic Number System
Author
Balaji, G.B. ; Balaji, K. ; Sundararaman, Harissh ; Naveen, A. ; Santha, K.R.
Author_Institution
Dept. of Electr. & Electron. Eng., Sri Venkateswara Coll. of Eng., Sriperumbudur
fYear
2007
fDate
22-24 Feb. 2007
Firstpage
410
Lastpage
413
Abstract
Logarithmic number system (LNS) is used in those signal processing applications where multiplication becomes a bottleneck. In LNS, multiplications and divisions are computed as additions and subtractions respectively. However to implement these additions and subtractions in LNS require large memory to store logarithmic and antilog values of numbers. This paper proposes possible techniques for memory reduction in LNS
Keywords
digital arithmetic; number theory; storage management; LNS; antilog value; logarithmic number system; memory reduction technique; multiplication; signal processing application; Approximation algorithms; Convolution; Digital signal processing; Error correction; Fixed-point arithmetic; Interpolation; Signal processing; Signal processing algorithms; Table lookup; Taylor series;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing, Communications and Networking, 2007. ICSCN '07. International Conference on
Conference_Location
Chennai
Print_ISBN
1-4244-0997-7
Electronic_ISBN
1-4244-0997-7
Type
conf
DOI
10.1109/ICSCN.2007.350772
Filename
4156654
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