DocumentCode :
2411815
Title :
BPDL - processor definition language with support for cycle accurate DSP architectures
Author :
Ahmed, Affan ; Abbas, Adeel
Author_Institution :
Dept. of Electr. Eng., Nat. Univ. of Sci. & Technol., Pakistan
fYear :
2001
fDate :
2001
Firstpage :
200
Lastpage :
204
Abstract :
This paper introduces BPDL - BURAQ processor definition language, developed by us for the BURAQ tool suite. The paper aims at elucidating the requirement for such a tool suite for the current technologically fast paced environment. The structure and constructs of the language, which supports cycle accurate description of DSP, is also explained with the help of examples to give a clear picture of the utility of the language as a generic processor definition language. The C++ like syntax is highlighted and results of the tests that have been run on a simulation of TMS320C4x are also described.
Keywords :
circuit simulation; digital signal processing chips; embedded systems; hardware description languages; software tools; BPDL; BURAQ processor definition language; BURAQ tool suite; C++ like syntax; DSP architectures; TMS320C4x; cycle accurate description; generic processor definition language; simulation; Assembly; Delay; Digital signal processing; Digital signal processing chips; Educational institutions; Hardware; Paper technology; Productivity; Testing; Time to market;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Multi Topic Conference, 2001. IEEE INMIC 2001. Technology for the 21st Century. Proceedings. IEEE International
Print_ISBN :
0-7803-7406-1
Type :
conf
DOI :
10.1109/INMIC.2001.995337
Filename :
995337
Link To Document :
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