Infrastructure for design and management of relocatable tasks in a heterogeneous reconfigurable system-on-chip

Author

Mignolet, J.-Y. ; Nollet, V. ; Coene, P. ; Verkest, D. ; Vernalde, S. ; Lauwereins, R.

Author_Institution

IMEC vzw, Leuven, Belgium

fYear

2003

fDate

2003

Firstpage

986

Lastpage

991

Abstract

The ability to (re)schedule a task either in hardware or software will be an important asset in a reconfigurable systems-on-chip. To support this feature we have developed an infrastructure that, combined with a suitable design environment permits the implementation and management of hardware/software relocatable tasks. This paper presents the general scope of our research, and details the communication scheme, the design environment and the hardware/software context switching issues. The infrastructure proved its feasibility by allowing us to design a relocatable video decoder. When implemented on an embedded platform, the decoder performs at 23 frames/s (320×240 pixels, 16 bits per pixel) in reconfigurable hardware and 6 frames/s in software.

Keywords

circuit CAD; hardware-software codesign; integrated circuit design; multiprogramming; reconfigurable architectures; system-on-chip; video coding; communication scheme; design environment; embedded platform; hardware/software context switching issues; hardware/software relocatable tasks; reconfigurable SoC; reconfigurable systems-on-chip; relocatable video decoder; task rescheduling; task scheduling; Application software; Communication switching; Context; Decoding; Hardware; Multitasking; Operating systems; Runtime; Software performance; System-on-a-chip;

fLanguage

English

Publisher

ieee

Conference_Titel

Design, Automation and Test in Europe Conference and Exhibition, 2003

ISSN

1530-1591

Print_ISBN

0-7695-1870-2

Type

conf

DOI

10.1109/DATE.2003.1253733

Filename

1253733