• DocumentCode
    2413349
  • Title

    Coarse-Grained Reconfigurable Image Stream Processor for Digital Still Cameras and Camcorders

  • Author

    Chen, Jason C. ; Shen, Chun-Fu ; Chien, Shao-Yi

  • Author_Institution
    Nat. Taiwan Univ., Taipei
  • fYear
    2007
  • fDate
    16-19 Sept. 2007
  • Firstpage
    81
  • Lastpage
    84
  • Abstract
    A 345 Mpixels/s coarse-grained reconfigurable image stream processor (CRISP) is proposed and implemented with 5 mm2 area in 0.18 mum CMOS technology for the image pipelines of digital still cameras and video camcoders. The novel CRISP architecture with scalable reconfigurable stage processing elements and reconfigurable interconnection could achieve high processing speed at low cost, while satisfying the flexibility and performance requirements of high-end image preprocessing for 10M-pixel scale still cameras and 1920times1080 camcorders. CRISP can execute image pipelines 83 times faster than the state-of-the-art digital signal processor with only about one-tenth die size.
  • Keywords
    CMOS digital integrated circuits; digital signal processing chips; image sensors; CMOS technology; CRISP architecture; coarse-grained reconfigurable image stream processor; digital still cameras; high-end image preprocessing; image pipelines; reconfigurable interconnection; scalable reconfigurable stage processing elements; state-of-the-art digital signal processor; video camcorders; Application specific integrated circuits; Costs; Digital cameras; Digital signal processing; Hardware; Pipelines; Reconfigurable architectures; Signal processing algorithms; Streaming media; Video equipment;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-1623-3
  • Electronic_ISBN
    978-1-4244-1623-3
  • Type

    conf

  • DOI
    10.1109/CICC.2007.4405686
  • Filename
    4405686