• DocumentCode
    2413643
  • Title

    Optimizing Circuit Performance and ESD Protection for High-Speed Differential I/Os

  • Author

    Sarbishaei, H. ; Semenov, O. ; Sachdev, M.

  • Author_Institution
    Waterloo Univ., Waterloo
  • fYear
    2007
  • fDate
    16-19 Sept. 2007
  • Firstpage
    149
  • Lastpage
    152
  • Abstract
    Impact of ESD protection devices on circuit operation is very important in gigahertz applications. In this paper, the impact of different ESD protection methodologies on CML drivers is discussed. ESD protection is provided using MOSFET and SCR devices. Study of the interaction between driver and ESD protection circuit shows that jitter is very sensitive to parasitics of ESD protection circuits. Furthermore, an analysis shows that substrate-triggering has less impact on jitter compared to gate-coupling.
  • Keywords
    current-mode logic; driver circuits; electrostatic discharge; jitter; thyristors; ESD protection devices; circuit operation; circuit performance optimisation; current mode logic drivers; gigahertz applications; high-speed differential I/O; jitter; silicon-controlled rectifier; substrate-triggering; CMOS technology; Circuit noise; Circuit optimization; Driver circuits; Electrostatic discharge; Frequency; Inverters; Jitter; Protection; Thyristors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    978-1-4244-1623-3
  • Electronic_ISBN
    978-1-4244-1623-3
  • Type

    conf

  • DOI
    10.1109/CICC.2007.4405701
  • Filename
    4405701