Title :
A 5-bit 4.2-GS/s flash ADC in 0.13-μm CMOS
Author :
Lin, Ying-Zu ; Liu, Yen-Ting ; Chang, Soon-Jyh
Author_Institution :
Nat. Cheng-Kung Univ., Tainan
Abstract :
A compact 5-bit flash ADC is designed and fabricated in TSMC 0.13-μm CMOS process. Resistive averaging network and interpolation are discussed and analyzed for power reduction. This proposed ADC consumes 180 mW from a 1.2 V supply and occupies 0.16 mm2 active area. Operating at 3.2 GS/s, the ENOB is 4.44 bit and ERBW 1.65 GHz. At 4.2 GS/s, the ENOB is 4.20 bit and ERBW 1.75 GHz. This ADC achieves FOMs of 2.51 and 2.80 pJ/conversion-step at 3.2 and 4.2 GS/s, respectively.
Keywords :
CMOS integrated circuits; analogue-digital conversion; interpolation; low-power electronics; CMOS; ENOB; ERBW; FOM; TSMC; flash ADC; frequency 1.65 GHz; frequency 1.75 GHz; interpolation; power 180 mW; power reduction; resistive averaging network; size 0.13 μm; voltage 12 V; word length 4.20 bit; word length 4.4 bit; word length 5 bit; Analog-digital conversion; Bandwidth; CMOS process; Calibration; Circuits; Energy consumption; Interpolation; Power amplifiers; Preamplifiers; Voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-0786-6
Electronic_ISBN :
978-1-4244-1623-3
DOI :
10.1109/CICC.2007.4405716
