DocumentCode :
2414273
Title :
A novel junction-free BE-SONOS NAND flash
Author :
Lue, Hang-Ting ; Lai, Erh-Kun ; Hsiao, Y.H. ; Hong, S.P. ; Wu, M.T. ; Hsu, F.H. ; Lien, N.Z. ; Wang, S.Y. ; Yang, L.W. ; Yang, T. ; Chen, K.C. ; Hsieh, K.Y. ; Liu, Rich ; Lu, Chih-Yuan
Author_Institution :
Emerging Central Lab., Macronix Int. Co., Ltd., Hsinchu
fYear :
2008
fDate :
17-19 June 2008
Firstpage :
140
Lastpage :
141
Abstract :
We have successfully demonstrated a novel junction-free BE-SONOS NAND Flash. Junction-free devices greatly improve the short channel effect and thus promise scaling of NAND Flash below 20 nm node. Instead of S/D junctions a very small space (Lt 30 nm) is left between adjacent devices. Junction is formed only at the outer region of NAND array, while there is no junction inside the array. Fringe field from the gate inverts the Si under the narrow space allowing conduction without a diffusion junction. Successful n-channel, p-channel and TFT BE-SONOS NAND devices are demonstrated using this technique. Simulation results suggest that this novel junction-free technique is scalable beyond 20 nm node. Moreover, the junction-free devices are unaffected by the thermal budget in the 3D TFT devices. This new device can be implemented in the current NAND Flash process without introducing new masks.
Keywords :
NAND circuits; flash memories; nanotechnology; thin film transistors; 3D TFT device; junction-free BE-SONOS NAND Flash; junction-free device; junction-free technique; short channel effect; Annealing; Current measurement; Degradation; Density measurement; Doping; Electrons; Etching; Interference; Thickness control; Thin film transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2008 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1802-2
Electronic_ISBN :
978-1-4244-1803-9
Type :
conf
DOI :
10.1109/VLSIT.2008.4588594
Filename :
4588594
Link To Document :
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