Title :
A cost-effective digital front-end realization for 20-bit ΣΔ DAC in 0.13 μm CMOS
Author :
Chen, Run ; Liu, Liyuan ; Li, DongMei
Author_Institution :
Tsinghua Univ., Beijing
Abstract :
A cost-effective digital front-end used in 20-bit ΣΔ DAC for audio applications is described in this paper. The digital front-end is composed of an interpolator and a ΣΔ modulator (DSM). Mixed-radix number representation (MRNR) algorithm combined with poly-phase filtering technique and high efficiency hardware realization method are used to achieve high data conversion precision and reduce the area of the interpolator. A single bit distributed feedback structure is adopted for DSM to shape quantization noise. The digital front-end works at a 1.2-V power supply and is implemented in 0.13 μm CMOS process, which occupies a die area of 0.63 mm2 and achieves more than 130 dB dynamic range.
Keywords :
σ-δ modulation; CMOS digital integrated circuits; digital-analogue conversion; ΣΔ DAC; ΣΔ modulator; CMOS; audio applications; data conversion; digital front-end; distributed feedback structure; interpolator; mixed-radix number representation; polyphase filtering; quantization noise; size 0.13 μm; voltage 1.2 V; word length 20 bit; CMOS process; Data conversion; Digital modulation; Distributed feedback devices; Filtering algorithms; Hardware; Noise shaping; Power supplies; Quantization; Shape;
Conference_Titel :
Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-0786-6
Electronic_ISBN :
978-1-4244-1623-3
DOI :
10.1109/CICC.2007.4405770
