Title :
Future Microprocessor Interfaces: Analysis, Design and Optimization
Author :
Casper, Bryan ; Balamurugan, Ganesh ; Jaussi, J.E. ; Kennedy, Jessie ; Mansuri, Mozhgan
Author_Institution :
Circuit Res. Lab, Hillsboro
Abstract :
High-aggregate bandwidth interfaces with minimized power, silicon area, cost and complexity will be essential to the viability of future microprocessor systems. Optimization of microprocessor interfaces at the system level is crucial to providing the most cost-effective and efficient solution. This paper details a comprehensive interconnect and system level analysis method that can be used to accurately evaluate platform-level tradeoffs and has been correlated to link measurements with 10% accuracy. System tradeoffs with respect to interconnect quality, equalization, modulation, clock architecture are shown. Interconnect and circuit density improvements are identified as a promising research direction to maximize the bandwidth and power efficiency of future microprocessor platforms.
Keywords :
integrated circuit interconnections; microprocessor chips; circuit density improvements; clock architecture; comprehensive interconnect analysis method; high-aggregate bandwidth interfaces; interconnect quality; microprocessor interfaces; microprocessor systems; system level analysis method; Aggregates; Bandwidth; Central Processing Unit; Cost function; Design optimization; Integrated circuit interconnections; Intersymbol interference; Jitter; Microprocessors; Power system interconnection;
Conference_Titel :
Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-1623-3
Electronic_ISBN :
978-1-4244-1623-3
DOI :
10.1109/CICC.2007.4405777
