DocumentCode :
2415521
Title :
Design Considerations and Benefits of Three-Dimensional Ternary Content Addressable Memory
Author :
Oh, Eun Chu ; Franzon, Paul D.
Author_Institution :
North Carolina State Univ., Raleigh
fYear :
2007
fDate :
16-19 Sept. 2007
Firstpage :
591
Lastpage :
594
Abstract :
Three dimensional (3D) ternary content addressable memory (TCAM) has been designed in a 0.18 mum fully depleted silicon on insulator (FD SOI) 3D IC process. This paper demonstrates that a 3D TCAM with three tiers can achieve 40% matchline capacitance reduction and 21% power reduction compared to a TCAM in a conventional single-tier process. This paper also discusses design considerations of 3D TCAM including partitioning methods for multiple tiers and layout methods of interconnects.
Keywords :
content-addressable storage; integrated circuit design; logic partitioning; silicon-on-insulator; 3D IC process; 3D ternary content addressable memory; capacitance reduction; fully depleted silicon on insulator; interconnect layout methods; multiple tiers; partitioning methods; size 0.18 mum; Associative memory; Decoding; Driver circuits; Energy consumption; Integrated circuit interconnections; Logic; Multilevel systems; Parasitic capacitance; Silicon on insulator technology; Three-dimensional integrated circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-1623-3
Electronic_ISBN :
978-1-4244-1623-3
Type :
conf
DOI :
10.1109/CICC.2007.4405801
Filename :
4405801
Link To Document :
بازگشت