An output capacitorless low-dropout regulator based on flipped voltage follower

Author

Xiliang Liu ; Zheng Song ; Jia Wen ; Baoyong Chi

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing, China

fYear

2014

fDate

28-31 Oct. 2014

Firstpage

1

Lastpage

3

Abstract

An output capacitor-less low-dropout (LDO) regulator based on flipped voltage follower (FVF) for system-on-chip (SoC) application is presented. With a common-gate amplifier and two-pole system, it evidently simplifies the architecture of the LDO regulator and achieves the stability more easily. Implemented in SMIC 55nm CMOS, the proposed LDO regulator only consumes 15 μA net current from 1.5V power supply, with a minimum dropout voltage of 200 mV. With 16pF total compensation capacitance, it can provide 0-30mA load current with a load capacitance range of 0-300pF.

Keywords

CMOS integrated circuits; circuit stability; operational amplifiers; system-on-chip; FVF; LDO; SMIC CMOS technology; SoC application; capacitance 0 pF to 300 pF; common-gate amplifier; compensation capacitance; current 0 mA to 30 mA; current 15 muA; flipped voltage follower; output capacitorless low-dropout regulator; size 55 nm; system-on-chip application; two-pole system; voltage 1.5 V; voltage 200 mV; Capacitance; Capacitors; Circuit stability; Regulators; System-on-chip; Transistors; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on

Conference_Location

Guilin

Print_ISBN

978-1-4799-3296-2

Type

conf

DOI

10.1109/ICSICT.2014.7021203

Filename

7021203