Title :
A scalable device array for statistical device-aging characterization
Author :
Sato, Takao ; Awano, Hiromitsu ; Hiromoto, Masayuki
Author_Institution :
Dept. of Commun. & Comput. Eng., Kyoto Univ., Kyoto, Japan
Abstract :
A device array circuit that is suitable for efficiently characterizing device parameter degradation due to bias temperature instability (BTI) is reviewed. The device array facilitates parallel application of stress and recovery bias voltages to multiple devices, reducing total measurement time significantly. The device count in the array is easily scalable to meet necessary statistical confidence level. Measurement examples of the two implementations containing 128 and 3,996 devices are also presented.
Keywords :
MOSFET; ageing; semiconductor device reliability; bias temperature instability; device array circuit; device parameter degradation; recovery bias voltages; scalable device array; statistical device-aging characterization; stress condition; Arrays; Degradation; Stress; Stress measurement; Threshold voltage; Time measurement; Voltage measurement; Device degradation; bias temperature instability (BTI); device aging;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
DOI :
10.1109/ICSICT.2014.7021224
