Abstract :
This paper discusses several of the SOC(System on chip) and NOC (Network on chip) power issues pertaining to DPM(dynamic power management), and how these issues were resolved in a SOC embedded DSP (Digital signal processor). In the analysis of the description of SOC system state power, we proposed a power matrix of SOC, and a dynamic programming (DP) optimization algorithm for multi-state, multi-layer, multi-path model of one DSP embedded in a SOC. We illustrate the system-level power optimization strategy of DPM and simulation executing process. The results show that the system significantly reduced power consumption.
