A CMOS op amp using a regulated-cascode transimpedance building block for high-gain, low-voltage achievement

A CMOS, self-biasing, single-supply op amp for low-voltage, high-gain applications is presented. The two-stage op amp includes a transimpedance building block used as a composite load for the input stage. The dc gain of the stage is substantially enhanced thanks to the very high output resistance of the active load. The building block is designed with regulated cascode components and, for bias stabilisation, a technique of replica bias sensing and common-mode feedback. This technique allows the supply voltage lowering to about (2|V_T|+2|V_{dc, out}|), which determines the minimum supply voltage of the op amp. At V_dd⩾1.8 V, major performances of the op amp are: A_dc>115 dB, f_T=9 10⁶ Hz, S_R=8 V/μs, P_dis =0.55 mW