DocumentCode
241622
Title
3D RRAM: Design and optimization
Author
Jinfeng Kang ; Bin Gao ; Chen, Bing ; Huang, Pei-Yu ; Zhang, F.F. ; Deng, Y.X. ; Liu, L.F. ; Liu, X.Y. ; Chen, H.-Y. ; Jiang, Z. ; Yu, S.M. ; Wong, H.-S Philip
Author_Institution
Inst. of Microelectron., Peking Univ., Beijing, China
fYear
2014
fDate
28-31 Oct. 2014
Firstpage
1
Lastpage
4
Abstract
A novel vertical RRAM for 3D cross-point architecture is proposed. The design and optimization issues of the proposed vertical RRAM for 3D cross-point architecture array are addressed from both device and array levels. A double layer stacked HfOx based vertical RRAM devices with interface engineering fabricated using a cost-effective fabrication process. The excellent performances such as low reset current, fast switching speed, high switching endurance and disturbance immunity, good retention and self-selectivity are demonstrated in the fabricated HfOx based vertical RRAM devices. The opimized design guidances for the 3D cross-point architecture array are presented.
Keywords
circuit optimisation; hafnium compounds; high-k dielectric thin films; integrated circuit design; random-access storage; three-dimensional integrated circuits; 3D RRAM; 3D cross-point architecture array; HfOx; cost-effective fabrication; double layer stacked HfOx based vertical RRAM devices; interface engineering; metal oxide based resistive switching random access memory; opimized design guidances; vertical RRAM; Abstracts; Arrays; Microprocessors; Performance evaluation; Switches; Three-dimensional displays;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location
Guilin
Print_ISBN
978-1-4799-3296-2
Type
conf
DOI
10.1109/ICSICT.2014.7021234
Filename
7021234
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