• DocumentCode
    241643
  • Title

    10 years of transistor innovations in System-on-Chip (SoC) era

  • Author

    Chia-Hong Jan

  • Author_Institution
    Technol. Manuf. Group, Intel Corp., Hillsboro, OR, USA
  • fYear
    2014
  • fDate
    28-31 Oct. 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    In the last decade, System-on-Chip (SoC) products, including smart phones, tablets, netbooks, embedded systems, wireless communications, and ASIC products, have emerged as the rising stars in the mobile and embedded IC markets. Concurrently, the main stream silicon process technology has undergone radical overhauls since the old dimensional scaling is running out of steam. Innovative transistor architectures based upon new materials and structures, such as strained silicon at 90 nm, high-k/metal gate at 45 nm, and recently 3-D Tri-Gate at 22 nm, have been developed and ramped into high volume manufacturing to continue Moore´s Law scaling. This paper examines how these advanced transistor architectures can be exploited to meet and exceed the technical requirements of new SoC products.
  • Keywords
    elemental semiconductors; embedded systems; integrated circuit design; silicon; system-on-chip; transistor circuits; 3D trigate; ASIC products; Moore´s law; Si; SoC products; embedded IC markets; embedded systems; high-k-metal gate; netbooks; silicon process technology; size 22 nm; size 45 nm; size 90 nm; smart phones; system-on-chip; tablets; time 10 year; transistor architectures; transistor innovations; wireless communications; Abstracts; Baseband; High K dielectric materials; Logic gates; Metals; Random access memory; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4799-3296-2
  • Type

    conf

  • DOI
    10.1109/ICSICT.2014.7021244
  • Filename
    7021244