Title :
A low power CMOS technology compatible non-volatile SRAM cell
Author :
Lina Wang ; Jinhui Wang ; Zezhong Yang ; Ligang Hou ; Na Gong
Author_Institution :
VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China
Abstract :
This paper presents a CMOS technology compatible non-volatile 8T SRAM called NV SRAM. NV SRAM works as conventional 8T SRAM to keep high speed and high noise margin in work mode; in sleep mode, the data is kept in non-volatile part and the power supply is switched off, thereby minimizing the leakage energy without data loss. Based on 65 nm SMIC Technology, simulation results show that sleep time is longer than 219 μs, NV SRAM is able to achieve energy savings. The NV SRAM is particularly effective to implement on-chip-memories with long idle time.
Keywords :
CMOS integrated circuits; SRAM chips; random-access storage; NV SRAM; SMIC technology; data loss; energy saving; leakage energy; low power CMOS technology compatible nonvolatile SRAM cell; noise margin; on-chip-memory; power supply; size 65 nm; sleep mode; Abstracts; CMOS integrated circuits; Charge pumps; Propagation losses; SRAM cells;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
DOI :
10.1109/ICSICT.2014.7021248
