DocumentCode :
2416951
Title :
Software implementation of LNS arithmetic in an ARM embedded system
Author :
Chen, Chichyang ; Liu, Li-Wei ; Jou, Jun-Wen
Author_Institution :
Dept. of Inf. Eng. & Comput. Sci., Feng Chia Univ., Taichung, Taiwan
fYear :
2009
fDate :
25-28 May 2009
Firstpage :
1012
Lastpage :
1014
Abstract :
Logarithmic number system (LNS) arithmetic is a good alternative for floating-point arithmetic. We have implemented 32-bit LNS arithmetic by using assembly and C languages on an ARM processor. Compared to FLP arithmetic, the proposed software-implemented LNS arithmetic can achieve a speedup factor of 9.12/13.45 in multiplication/division, with only about 34% speed degrade in addition/subtraction. For the AB function, the proposed LNS arithmetic is 91.06 times faster than the FLP arithmetic. We conclude that our proposed software LNS arithmetic implementation approach is very efficient for computing complex arithmetic functions in an ARM embedded system.
Keywords :
C language; assembly language; digital arithmetic; embedded systems; microprocessor chips; 32-bit LNS arithmetic; ARM embedded system; ARM processor; C language; FLP arithmetic; arithmetic functions; assembly language; floating point arithmetic; logarithmic number system; software implementation; software-implemented LNS arithmetic; Application software; Assembly; Computer science; Consumer electronics; Digital arithmetic; Embedded computing; Embedded software; Embedded system; Floating-point arithmetic; Hardware; ARM embedded processors and systems; Logarithmic number system arithmetic; floating-point arithmetic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Consumer Electronics, 2009. ISCE '09. IEEE 13th International Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4244-2975-2
Electronic_ISBN :
978-1-4244-2976-9
Type :
conf
DOI :
10.1109/ISCE.2009.5157011
Filename :
5157011
Link To Document :
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