• DocumentCode
    2417188
  • Title

    Vertically scaled 5 nm GaN channel enhancement-mode N-polar GaN MOS-HFET with 560 mS/mm gm and 0.76 Ω-mm Ron

  • Author

    Singisetti, Uttam ; Wong, Man Hoi ; Speck, James S. ; Mishra, Umesh K.

  • Author_Institution
    ECE & Mater. Depts., Univ. of California, Santa Barbara, CA, USA
  • fYear
    2011
  • fDate
    20-22 June 2011
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    This paper reports a self-aligned N-polar GaN FET with a 5-nm GaN channel and atomic layer deposited (ALD) Al2O3 gate dielectric with a peak Id of 1.2 A/mm and peak gm of 560 mS/mm. The Ron of 0.76 Ω-mm for this device is the lowest reported for E-mode GaN FETs.
  • Keywords
    III-V semiconductors; MOSFET; atomic layer deposition; gallium compounds; high electron mobility transistors; wide band gap semiconductors; GaN; MOS-HFET; atomic layer deposition; channel enhancement-mode; size 5 nm; FETs; Gallium nitride; Logic gates; Performance evaluation; Radio frequency; Resistance; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference (DRC), 2011 69th Annual
  • Conference_Location
    Santa Barbara, CA
  • ISSN
    1548-3770
  • Print_ISBN
    978-1-61284-243-1
  • Electronic_ISBN
    1548-3770
  • Type

    conf

  • DOI
    10.1109/DRC.2011.6086642
  • Filename
    6086642
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2417188