• DocumentCode
    2417197
  • Title

    Project on an electrically reprogrammable fast read-out memory using bipolar tetrode transistors

  • Author

    Dom, J.P. ; Roux, Ph ; Aucouturier, J.L. ; Depey, M.

  • Author_Institution
    Univ. de Bordeaux 1, Talence, France
  • fYear
    1976
  • fDate
    21-24 Sept. 1976
  • Firstpage
    46
  • Lastpage
    47
  • Abstract
    This paper presents a project on an electrically reprogrammable memory system in which the control of the avalanche degradation of the H of bipolar tetrode transistor is executed by the gate voltage. The design of a type REPROM with 1024 bits capacity having an access time better than 100 ns for a total power of 500 mW is attempted.
  • Keywords
    EPROM; bipolar transistors; REPROM; avalanche degradation; bipolar tetrode transistors; electrically reprogrammable fast read-out memory; power 500 mW; word length 1024 bit; Avalanche breakdown; Bipolar transistors; Circuits; Control systems; Degradation; Hot carriers; Logic arrays; Switches; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conference, 1976. ESSCIRC 76. 2nd European
  • Conference_Location
    Toulouse
  • Type

    conf

  • DOI
    10.1109/ESSCIRC.1976.5469100
  • Filename
    5469100
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2417197