DocumentCode :
241768
Title :
A 500-1000MS/s 12-bit resolution level-shift bootstrapped switch
Author :
Jingjing Wang ; Chixiao Chen ; Zemin Feng ; Fan Ye ; Junyan Ren
Author_Institution :
State-key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
fYear :
2014
fDate :
28-31 Oct. 2014
Firstpage :
1
Lastpage :
3
Abstract :
This paper presents a new high speed and high precision level-shift bootstrapped switch. By adopting analog source follower as a level shifter, instead of the traditional digital switches under the 65nm process, the full scale built-up time is reduced to 51.3ps which is much less than the latter. The simulation result shows that when the sampling frequency is 500MHz, the proposed bootstrapped switch achieves an ENOB of 12.56bit, an SNDR of 77.37dB, an SFDR of 78.02dB with a load of 2.5-pF sampling capacitor. The power consumption is 2.71 mW under 1.2V and 2.5V supply. While the sample frequency is 1GHz, the switch achieves an ENOB of 11.16bit, an SNDR of 68.33dB, an SFDR of 68.77dB with the same load. The power consumption under 1GHz sampling frequency is 2.87 mW under those supply.
Keywords :
analogue-digital conversion; bootstrap circuits; digital signal processing chips; analog source follower; digital switches; frequency 1 GHz; frequency 500 MHz; level shifter; level-shift bootstrapped switch; power 2.71 mW; power 2.87 mW; size 65 nm; voltage 1.2 V; voltage 2.5 V; Abstracts; Harmonic analysis; Signal to noise ratio; Simulation; Switches; Time-frequency analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
Type :
conf
DOI :
10.1109/ICSICT.2014.7021306
Filename :
7021306
Link To Document :
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