DocumentCode
2417698
Title
Calculated performance of SIS junctions as frequency multipliers
Author
Foltz, H.D. ; Davis, J.H.
Author_Institution
Electr. Eng. Res. Lab., Texas Univ., Austin, TX, USA
fYear
1990
fDate
8-10 May 1990
Firstpage
307
Abstract
The harmonic balance technique is used to examine the performance of SIS (superconductor-insulator-superconductor) junctions as millimeter- and submillimeter-wave frequency multipliers. The effects of drive level, bias, embedding impedance, and junction parameters on harmonic generation are described. The calculations show that the output power is only a few nanowatts per junction but that the efficiency is in the range of 15-18% for realistic junction parameters.<>
Keywords
frequency multipliers; harmonic generation; solid-state microwave devices; superconducting junction devices; 15 to 18 percent; EHF; MM-waves; SIS junctions; THF; bias; drive level; efficiency; embedding impedance; frequency multipliers; harmonic balance technique; harmonic generation; junction parameters; models; output power; realistic junction parameters; submillimeter-wave frequency multipliers; superconductor-insulator-superconductor; Capacitance; Circuits; Current-voltage characteristics; Fourier series; Frequency conversion; Impedance; Laboratories; Power generation; Superconducting device noise; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 1990., IEEE MTT-S International
Conference_Location
Dallas, TX
Type
conf
DOI
10.1109/MWSYM.1990.99581
Filename
99581
Link To Document