Title :
A 25Gb/s adaptive decision feedback equalizer for 100G Ethernet in 65NM CMOS technology
Author :
Jinxing Guo ; Liji Wu ; Shuai Yuan ; Xuqiang Zheng ; Ziqiang Wang
Author_Institution :
Tsinghua Nat. Lab. for Inf. Sci. & Technol., Tsinghua Univ., Beijing, China
Abstract :
This paper describes a 25Gbps adaptive 2-tap decision feedback equalizer (DFE) for serial backplane receiver. The proposed DFE employed a soft-decision structure and an adaptive engine based on improved LMS algorithm (sign-sign LMS) which is designed in 65nm CMOS technology. Post-simulation results show that it can totally compensate 15.5dB loss at the Nyquist frequency for 25Gb/s PRBS31 transmission over 200mm RLGC (resistance, inductance, conductance and capacitance) channel. The active adaptive DFE area is 0.039 mm2 and total power consumption is 10.5mw from 1V supply.
Keywords :
feedback; least mean squares methods; transceivers; CMOS technology; DFE; Ethernet; Nyquist frequency; RLGC channel; adaptive 2-tap decision feedback equalizer; bit rate 25 Gbit/s; improved LMS algorithm; serial backplane receiver; Adaptive equalizers; CMOS integrated circuits; CMOS technology; Decision feedback equalizers; Least squares approximations; Receivers; Solid state circuits;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4799-3296-2
DOI :
10.1109/ICSICT.2014.7021350
