DocumentCode
241861
Title
Novel bidirectional IO multiplexing circuit design
Author
Junteng Zhang ; Jinhui Wang ; Na Gong
Author_Institution
VLSI & Syst. Lab., Beijing Univ. of Technol., Beijing, China
fYear
2014
fDate
28-31 Oct. 2014
Firstpage
1
Lastpage
3
Abstract
New bidirectional IO multiplexing circuits are presented in this paper. They are applied in the chips which consist of several modules, making the modules share the same IOs. The chip area therefore is saved by reducing the number of IOs. As compared with the unidirectional IO multiplexing circuits, it realizes bidirectional IO multiplexing among different modules. Taking the chip which consists of four modules as an example, the new IO multiplexing circuits based on static and dynamic CMOS circuit are compared and analyzed. According to the simulation results, the maximum operating frequency of new bidirectional IO multiplexing circuit reaches as high as 2.5GHz.
Keywords
CMOS logic circuits; integrated circuit design; multiplexing; bidirectional IO multiplexing circuit design; chip area reduction; dynamic CMOS circuit; multiplexing circuits; static CMOS circuit; Abstracts; Multiplexing; Partial discharges;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2014 12th IEEE International Conference on
Conference_Location
Guilin
Print_ISBN
978-1-4799-3296-2
Type
conf
DOI
10.1109/ICSICT.2014.7021353
Filename
7021353
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