DocumentCode :
2419282
Title :
A CMOS class AB current-multiplier
Author :
Oliaei, O. ; Loumeau, P.
Author_Institution :
CNRS, Ecole Nat. Superieure des Telecommun., Paris, France
Volume :
1
fYear :
1997
fDate :
9-12 Jun 1997
Firstpage :
245
Abstract :
A technique to design four-quadrant class AB current-multiplier is described. This technique uses saturated complementary transistors and exploits the square-law behavior of MOS transistors. The particularities of this technique are high signal swing, high dynamic range, high bandwidth and low consumption. Two different approaches to design the current-multiplier for a supply voltage of 3.3 V are presented
Keywords :
CMOS analogue integrated circuits; analogue multipliers; 3.3 V; CMOS IC; MOS transistors; class AB current multiplier; four-quadrant current multiplier; saturated complementary transistors; square-law behavior; Adaptive filters; Bandwidth; Circuits; Current supplies; Dynamic range; Frequency modulation; MOSFETs; Mirrors; Neural networks; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
Type :
conf
DOI :
10.1109/ISCAS.1997.608686
Filename :
608686
Link To Document :
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