Using an XML schema to validate a formal hardware compiler

The complexity of current mixed software/hardware custom digital systems, has led to the requirement for automated high-level synthesis of the system from abstract, executable specifications, in order to drastically reduce the long development cycles. This paper introduces an approach to validate the hardware compilation process of a formal, high-level synthesizer, using provably-correct logic programming and XML schema techniques via an intelligent inference engine. The XML schema definition model is automatically generated from a formal intermediate format which forms the basis of connection and data exchange between the front-end and the back-end phases of the hardware compiler. The proposed methodology and the prototype tools are evaluated with results from real life applications such as graphics applications and an MPEG video compression engine.